This invention relates to a semiconductor memory device arranged to detect a defective part(s).
It is required to test semiconductor memory devices, such as static random access memory (SRAM), dynamic random access memory (DRAM) and the like, before they are forwarded. For example, a PWL timer has been used to determine the length of time during which the associated word line remains at a high level when the reading and/or writing operation of a pulsed word line (PWL) type SRAM is tested. However, such a PWL timer is arranged to determine the same time length regardless of whether it operates in the testing or using mode. For this reason, the possibility exists that some of the forwarded semiconductor devices do not have enough internal timing. Such defective semiconductor devices cannot satisfy specifications with small variations in the transistor characteristics.